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1 of 15 120808 description the DS2711 and ds2712 are ideal for in-system or stand-alone charging of 1 or 2 aa or aaa nimh ?loose? cells. temperature, voltage, and charge time are monitored to provide proper fast charging control algorithms for nickel metal hydride (nimh) batteries. battery tests are included to detect defective or inappropriate cells such as alkaline primary batteries. the DS2711/ds2712 support series and parallel topologies, with independent monitoring and control of each cell. charging of nicd chemistry cells is also supported. features ? charge 1 or 2 nimh cells ? detect and avoid charging alkaline cells ? precharge deeply depleted cells ? fast charge nimh with - v termination sensitivity of 2mv (typ) ? monitor voltage, temperature, and time for safety and secondary termination ? regulate charge current: linear control (DS2711) switch-mode control (ds2712) ? drive pmos or pnp-type pass element or switch, or an optocoupler ? compatible with popular optocouplers and integrated primary side pwm controllers ? small 16-pin so or tssop package applications desktop/stand-alone chargers (aaa/aa) digital still cameras music players games toys pin configuration pin description pin name function 1 cc1 cell 1 charge-control output 2 cc2 cell 2 charge-control output 3 led1 cell 1 status 4 v ss ground reference and chip-supply return 5 led2 cell 2 status, mode-select input 6 csout current-sense output 7 vn1 current-sense + input 8 vn0 current-sense - input 9 dmsel display-mode select 10 ctst cell test threshold set 11 tmr charge timer set 12 v dd chip-supply input (4.0v to 5.5v) 13 thm1 cell 1 thermistor input 14 thm2 cell 2 thermistor input 15 vp1 cell 1 positive-terminal sense input 16 vp2 cell 2 positive-terminal sense input DS2711/ds2712 loose cell nimh chargers www.maxim-ic.com see table 1 for ordering information. 16 so (150 mil) / tssop (4.4 mm) www..net
DS2711/ds2712: loose cell nimh charger 2 of 15 table 1. ordering information + denotes lead-free package. absolute maxi mum ratings* voltage on all pins relative to v ss -0.3v to +6v voltage on dmsel v dd + 0.3v continuous sink current cc1, cc2, led1, led2 and csout 20ma operating temperature range -40c to +85c storage temperature range -55c to +125c soldering temperature s ee ipc/jedecj-std-020 *this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operat ing conditions (4.0v v dd 5.5v; t a = -20 c to +70 c.) parameter symbol conditions min typ max units supply voltage v dd (note 1) 4.0 5.5 v input voltage range led2, dmsel -0.3 +5.5 v dc electrical characteristics (4.0v v dd 5.5v, t a = -20 c to +70 c, unless otherwise noted.) parameter symbol conditions min typ max units supply current, v dd i dd operating mode 250 500 a uvlo threshold v uvlo v dd rising (note 1) 3.5 3.9 v uvlo hysteresis v uhys v dd falling from above v uvlo 40 mv output-voltage low, cc1, cc2, led1, led2 v ol1 v dd = 5.0v, i ol = 20ma (note 1) 1.0 v output-voltage low, csout v ol2 v dd = 5.0v, i ol = 20ma (note 1) 0.75 1.25 v leakage current, cc1, cc2, led1, led2, csout i lkg v dd = 5.0v, output inactive -1 +1 a threshold voltage, - v termination v - v after t tho 1.0 2.0 3.0 mv mode test current, dmsel, led2 i mtst (notes 2, 3) 5 15 a part marking pin-package DS2711z DS2711 16 so DS2711z/t&r DS2711 16 so, tape-and-reel ds2712z ds2712 16 so ds2712z/t&r ds2712 16 so, tape-and-reel DS2711z+ DS2711 16 so DS2711z+t&r DS2711 16 so, tape-and-reel ds2712z+ ds2712 16 so ds2712z+t&r ds2712 16 so, tape-and-reel DS2711e+ DS2711 16 tssop DS2711e+t&r DS2711 16 tssop, tape-and-reel ds2712e+ ds2712 16 tssop ds2712e+t&r ds2712 16 tssop, tape-and-reel www..net
DS2711/ds2712: loose cell nimh charger 3 of 15 parameter symbol conditions min typ max units input logic-high, dmsel, led2 v ih (note 1) v dd - 0.2v v input logic-low, dmsel, led2 v il (note 1) 0.2 v input leakage current, dmsel i il1 after power-up mode select, dmsel = v dd or v ss -1 +1 a threshold voltage, cell test v ctst r ctst = 80k 85 100 115 mv threshold voltage, cell voltage low v bat-low cc1 = cc2 = high-z (note 4) 0.9 1.0 1.1 v threshold voltage, cell voltage max1 v bat-max1 cc1 = cc2 = high-z (note 4) 1.55 1.65 1.75 v threshold voltage, cell voltage max2 v bat-max2 cc1, cc2 active (note 4) 1.64 1.75 1.86 v threshold voltage delta v bat-max v bat-max2 - v bat-max1 (note 5) 90 100 110 mv threshold voltage, thermistor - min v thm-min (notes 1, 4, 6) v dd x 0.73 v threshold voltage, thermistor - max v thm-max (notes 1, 4, 6) 0.30 v dd x 0.33 0.36 v threshold voltage, thermistor - stop v thm-stop (notes 1, 4, 6) v dd x 0.29 v threshold current, tmr pin suspend i tmr-sus 0.1 0.5 a presence test current, vp1, vp2 i ptst parallel: v dd 4.0v, series: v dd 4.5v 10 15 a reverse leakage current, vp1, vp2 i lkgr v dd = 0v, vp1 = 1.5v, vp2 = 3.0v 2 a 125 mv current-sense reference voltage v iref (note 1, 4, 7) -6% +6% % gain, current-sense error amp g m DS2711 (note 8) 0.9 1.5 -1 gain, current-sense comparator g m ds2712 (note 8) 10 -1 propagation time, current-sense comparator t pdly ds2712, 2mv over/underdrive 0.25 s hysteresis, current- sense comparator v hys-comp ds2712 22 24 26 mv electrical characteristics: timing (4.0v v dd 5.5v, t a = -20 c to +70 c, unless otherwise noted.) parameter symbol conditions min typ max units internal timebase period t base 0.96 s internal timebase accuracy -10 +10 % duty factor, series fast charge cc1 0.969 duty factor, series precharge/top-off cc1 0.250 duty factor, parallel fast charge cc1, cc2 0.484 www..net
DS2711/ds2712: loose cell nimh charger 4 of 15 parameter symbol conditions min typ max units duty factor, parallel precharge/top-off cc1, cc2 0.125 duty factor, maintenance charge cc1, cc2 0.0156 cell test interval t ctst 31 s precharge time-out t pchg v cell < v bat-min 34 minutes fast-charge termination hold-off period t tho 4 minutes fast-charge flat voltage time-out t flat v cell not increasing 16 minutes charge timer period t ctmr r tmr = 100k 2.5 h charge timer accuracy r tmr = 100k -5 +5 % charge timer range t ctmr-range 0.5 10 h note 1: voltages relative to v ss . note 2: i mtst current is applied as a source current and as a sink current within 5ms after power-up. note 3: when operating in two-cell-series charge c onfiguration, the dmsel pin must have le ss than 50pf of external load capacitance for proper operation. if the load capacitance is greater than 50 pf, a resistor voltage divider should be used to maintain dmsel at v dd / 2. note 4: specification applicable dur ing charge cycle with t a = 0 c to +70 c. note 5: v bat-max1 and v bat-max1 are generated from the same reference. their ranges never overlap. note 6: v thm-min, v thm-max, and v thm-stop are fixed ratios of v dd. their ranges never overlap. note 7: tested with i csout = -1ma. note 8: gain tested with 1mv step with i csout = -1ma. www..net
DS2711/ds2712: loose cell nimh charger 5 of 15 figure 1. block diagram www..net
DS2711/ds2712: loose cell nimh charger 6 of 15 figure 2. state diagram por standby power ccx = hi-z ledx = hi-z vdd > vpor (3.7v) presence test ccx = hi-z ledx = no battery vbat < 1.65v t < pctimeout or vbat < 1v vbat > 1.75v or t < 0c or t > 45c vdd < vpor -vhys (asynchronously from anywhere) prechg ccx = active 12.5% par., 25% ser. ledx = charging fault standby power ccx = hi-z ledx = fault fail: von - voff > v ctst cell test ccx = hi-z ledx = charging t > 50 fast chg t < fast timeout topoff chg t < topoff timeout delta-v detect or t > fast timeout maint ccx = active 1/64 ledx = maintenance t > 50 or t > topoff timeout t > pctimeout or t < 0 or t > 50 or vbat > 1.75v vbat > 1.75v vbat > 1.75v (asynchronously from anywhere) pass 32 clock interval vbat > 1v and t < pctimeout and t < 50c ccx = active 12.5% par., 25% ser. ledx = charging ccx = active 48% par., 97% ser. ledx = charging vbat > 1.75v t < 1s www..net
DS2711/ds2712: loose cell nimh charger 7 of 15 detailed description charge algorithm overview a charge cycle begins in one of three ways: with the application of power to the DS2711 with cell(s) already inserted, with the detection of cell insertion after power-up, or when exiting suspend mode with cell(s) inserted. the charge cycle begins with precharge qualific ation to prevent fast charging of deeply depleted cells or charging under extreme temperature conditions. precharging is perform ed at a reduced rate until each cell reaches 1v. the algorithm proceeds to a fast-charge phase, which includes cell tests to avoid accidental charging of alkaline cells or nimh cells that are worn-out or damaged. fast charging c ontinues as long as the cell temperature(s) are less than 50 c (based on thm1, thm2 voltages) and the open-circui t cell voltage(s) are between 1.0v and 1.75v. fast charging terminates by the - v (negative delta voltage) method. the top- off charge phase follows to completely charge the cells. after the top-off charge timer expires, the maintenance charge phase continues indefinitely to keep the cells at a full state of charge. maximum volt age, temperature, and charge-time monitoring during all charge phases act as secondary or safety termination me thods to provide additional protection from overcharge. each cell is monitored independently, and in parallel m ode the charge phase of each cell is independently controlled. series charge configuration the DS2711/ds2712 series configuration supports one or two-slot stand-alone and one or two cell in-system chargers. the single-cell-series mode charges one cell wh ile the two-cell-series mode charges two series cells. since the cells are charged in series, cell sizes should not be mixed in the series configuration. in the application example in figure 3, charge current is gated to the batte ry cells by a pnp transistor under the control of the cc1 pin of the DS2711. current regulation is performed outsi de of this example schematic using the current-sense feedback provided by the DS2711 csout pin. the ds2712 can also be used in this circuit to provide switch-mode control on the csout pin. rsns = 0.125 sets the charge source current, ichg, to 1a. in series mode, the effective charge current is 0.969 x ichg = 969ma. figure 3. series configurati on with external current regulation www..net
DS2711/ds2712: loose cell nimh charger 8 of 15 parallel charge configuration the parallel configuration supports two slot stand-alone chargers. charge pulses are fed alternately to each cell under the control of the cc1 and cc2 pins so the charge regimes occur in parallel. the duty cycle on cc1 and cc2 are independent of one another. transitions from precharge to fast charge, fast charge to top-off, and top-off to maintenance occur independently for each cell. the configuration shown in figure 4 is for charging two cells with the current-s ense feedback regulating the charge source to 2a (rsns = 0.068 ). the effective charge current for each cell is 2a x 0.484 = 0.968a. a charger with battery holders designed to accept either aa or aaa ce ll sizes can be constructed with the current-sense resistance split between two separate resistors so each cell type (aa or aaa) is charged at a different rate. mechanical design of the holders is required to prevent insertion of more than one cell in each slot. the holder design must also prevent electrical c ontact with reverse polarity insertion. figure 4. parallel configurat ion with external current regulation the series or parallel charge configuration is programmed by strapping led2 in the low, high, or high-z (float) state during power-up. in this example and the following one, t he parallel charge mode is selected by pulling led2 pin high during power-up. this is accomplis hed in this example by the led and 270 resistor. in applications where only one led is used, a 100k pullup resistor is recommended. see table 3. charge mode selection on page 13 for additional configuration programming information. www..net
DS2711/ds2712: loose cell nimh charger 9 of 15 ds2712 parallel charge confi guration with switch-mode charge current regulation the example in figure 5 uses the ds2712 to regulate charge current as a switching (buck) regulator. ichg is set to 2a using rsns = 0.056 . the effective charge current for each cell is ichg x 0.484 = 968ma. the csout comparator output switches off when the voltage ac ross the sense resistor goe s above 0.125v and back on when the voltage drops below 0.100v. in this mode, the operating frequency is determined primarily by the value of the inductor, the hysteresis, the input voltage, and the voltage on the cells. in some cases, a damping network may be required to prevent overshoot with the batteries removed. figure 5. parallel configuratio n with switch-mode current regulation (ds2712 only) www..net
DS2711/ds2712: loose cell nimh charger 10 of 15 undervoltage lockout (uvlo) the uvlo circuit serves as a power-up and brownout detector by monitoring v dd to prevent charging until v dd rises above v uvlo , or when v dd drops below v uvlo - v hys . if uvlo is active, charging is prevented, the state machine is forced to the reset state, and all charge timers are reset. a 10 s deglitch circuit provides noise immunity. internal oscillator and clock generation an internal oscillator provides the main clock source used to gener ate timing signals for intern al chip operation. the precharge timer, hold-off timers, and timings for cc1/cc2 ope ration and cell testing are derived from this timebase. in case the internal clock should ever fail, a watchdog det ection circuit halts charging. the watchdog safety circuit and charge timer set by the tmr pin are derived from s eparate oscillators than the main clock source. current-sense amplifier (DS2711) an error amplifier block provides several options to regulate the charge current. t he 20ma open-drain output can drive a pmos or pnp pass element for linear regulation, or the output can drive an optocoupler for isolated feedback to a primary-side pwm controller. the vn0 pin is a remote-sense return and should be connected to the grounded side of the sense resistor using a separate, insulated conductor. figure 6. current-sense amplifier response the open-loop amplifier response shown in figure 6 was measured with i csout = -1ma. an error signal between the current-sense signal (acr oss a sense resistor) and the 0.125v inte rnal reference is produced so the voltage across the sense resistor is maintained at v iref in a closed-loop circuit. current-sense comparator (ds2712) the comparator in the ds2712 switches between on and off and is capable of driving a pnp bipolar or a pmos transistor, enabling the use of a switched-mode power stag e. hysteresis on the comparator input provides noise rejection. in the closed-loop regulation circuit of figur e 5, the comparator regulates voltage across the sense resistor to a dc average of: v rsns = v iref - 0.5 x v hys-comp = 0.125v frequency (hertz) 10 1 10 2 10 3 10 4 10 5 10 6 10 7 gain 0.00 0.20 0.40 0.60 0.80 1.00 1.20 phase -300 -250 -200 -150 -100 -50 0 gain phase www..net
DS2711/ds2712: loose cell nimh charger 11 of 15 charge timer the charge timer monitors the duration of charge in fast and top-off charge phases, and is reset at the beginning of each phase. the time-out period is set with an exte rnal resistor connected from the tmr pin to v ss . resistors can be selected to support fast-charge time-out periods of 0.5 to 10 hours and top-o ff charge time-out periods of 0.25 to 5 hours. if the timer expires in fast-charge, the timer co unt is reset and charging proceeds to the top-off charge phase. the top-off time-out peri od is half of the fast charge time-out peri od. if the timer expires in top-off, charging proceeds to the maintenance phase. the programm ed charge time approximately follows the equation: t = 1.5 x r / 1000 (time in minutes) suspend suspension of charge activity is possible by floatin g the tmr pin. the cc1 and cc2 outputs become high-z and the charge timer stops. the state machine and all timers are reset to their presence test conditions. temperature sense connecting an external 10k ntc thermistor between thm1 or thm2 (thmx) and v ss , and a 10k bias resistor between v dd and thmx allows the DS2711 to sense temperature. to sense the temperature of the battery cells, locate the thermistor close to the body of the battery cell so thm1 monitors the temperature of cell-1 and thm2 monitors the temperature of cell-2. alternatively, the ther mistor can sense ambient temperature by locating it away from the cells. thm1 and thm2 can be connected together to sense temper ature using a single thermistor and bias resistor. the temperature qualification function c an be defeated by connecting thm1 and thm2 to a single resistor-divider supplying a voltage between the thermist or-min and thermistor-max th reshold voltages. several recommended 10k thermistors are shown in table 2. min, max temperature compare the voltage thresholds of the thmx inputs (vthm-min, vt hm-max) are set to allow fast charging to start if 0 c < t a < 45 c when using the recommended 10k bias and 10k thermistor. if fast charging is in progress, and the voltage on thmx reaches vthm-stop, fast char ging stops and the maintenance phase begins. table 2. thm1, thm2 thresholds temperature ( c) thm threshold ratio of v dd thermistor resistance ( ) semitec 103at-2 fenwal 197-103lag-a01 173-103laf-301 min 0.73 27.04k 0 c 4 c max 0.33 4.925k 45 c 42 c stop 0.29 4.085k 50 c 47 c figure 7. cell voltage se nse points www..net
DS2711/ds2712: loose cell nimh charger 12 of 15 cell voltage monitoring in the 2-cell series mode, the voltage difference between vp2 and vp1 is used to determine the vcell2 voltage in the two-cell series stack. the voltage difference between vp1 and vn1 is used to determine the vcell1 voltage. in the 1-cell series mode, the difference between vp1 and vn1 is used as the cell voltage. vp2 can be left floating in the 1-cell series mode. in parallel mode, the difference between vp2 and vn1 is used for the vcell2 voltage, and the difference between vp1 and vn1 is used for vcell1 voltage. individual cell voltages are monitored for minimum and maximum values, using the v bat-min , v bat-max1 and v bat-max2 threshold limits. upon inserting a cell or power-up with cells inserted, cell voltages must be less than the v bat-max1 threshold before charging begins. the v bat-min threshold determines whether a pr echarge cycle should precede the fast charge cycle, and when to transition from precharge to fast charge. once fast charging commences, cell voltages are compared to the v bat-max2 threshold once per second. the comparison occurs while the charge control pin (cc1 or cc2) cont rolling current to the cell is active (low). when the char ge control pin is active so charge is applied to the cell, the cell voltage is referred to as the v on voltage. when the charge-control pin is inactive, the cell voltage is referred to as the v off voltage. if v bat-max2 is exceeded in fast charge, charging is halted and a fault condition is displayed. while fast charge is in progress, cell voltage measurements are stored and compared to future measurements for ch arge termination and cell test purposes. two types of tests are performed to detect primary alkaline and lithium cells or defective nimh or nicd secondary cells. cells are tested individually in the series and paralle l configurations, so that a single improper or defective cell can be detected quickly. in the seri es configuration, a single defective cell will terminate charge for both cells, whereas the parallel mode continues charging the good cell and stops charging the defective cell. v ctst is set by the resistance from the ctst pin to ground. the nominal sensitivity of 100mv is set by connecting an 80k resistor between ctst and v ss . the detection threshold can be set from 32mv to 400mv. the following formula approximates the setting for the detection threshold. v ctst = 8000/r (value in volts) - v and flat voltage termination during fast charge, - v detection is performed by comparing successive voltage measurements for a drop of 2mv in the cell voltage. a hold-off period for - v detection begins at the start of fast charging and prevents false termination in the first few minutes of the charge cy cle. once the hold-off period expires, cell voltage measurements are acquired every 32 cl ock cycles (during the ccx off time). when a newly acquired voltage measurement is greater than any previous one, the new va lue is retained as the maximum value. when the cell voltage no longer increases, the maximum value is retai ned and compared against subsequent values. if the cell voltage drops by the - v threshold, v - v , (2mv typ), fast charging is terminat ed. if the cell voltage remains flat such that the maximum value persists for a period of 16 minutes (t flat ), fast charge terminates and top-off charging begins. top-off and maintenance in top-off mode, the charger scales the cell current to 25% of the fast charge current. the charge timer is reset and restarted with a time-out period of one half the fast-charge duration. when th e charge timer expires in top-off, the charger enters maintenance and delivers 1/64 of the charge source current to the cells. maintenance charge continuous until power is removed, the cell(s) are remo ved or the DS2711/ds2712 is cycled into and out of suspend mode by floating the tmr pin. selecting the charge mode the charge mode configuration is selected by testing the led2 pin during startup. an internal current source tests the state of the led2 pin by pulling up and pulling down on t he pin to determine if it is high, low, or floating. the recommended pullup or pulldown resistor value (if used) is 100k . in the parallel charging circuit diagrams on page 8, no resistor is shown. the current path through the led and 270 resistor is sufficient to pull the led2 pin high at power-up to select the parallel mo de. refer to the mode test current (i mtst ) specification in the electrical characteristics table to select other pullup values. www..net
DS2711/ds2712: loose cell nimh charger 13 of 15 table 3. charge mode selection led2 pin strapping mode low 1-cell series floating 2-cell series high parallel cc1 and cc2 outputs the cc1 and cc2 operate as open-drain outputs that drive ac tive low to connect the charge source to the battery cell. during charge, the behavior of the cc1 and cc2 out puts depends on the charge-mode configuration. in parallel mode, cc1 and cc2 are driven low in alternating ti me slots. the charge source is loaded by just one cell during any time slot. in the 1-cell and 2-cell series mode, only cc1 is driven. except for the periodic performance of impedance and - v tests, series mode charging is continuous duri ng the fast charge phase rather than pulsed in parallel mode. parallel mode fast charge referring to figure 4. parallel configuration wi th external current regulation, cc1 controls the pnp switch that gates current to the cell in slot 1. cc 2 controls the pnp switch that gates current to the cell in slot 2. during fast charge, current is gated to each slot sequentially, with char ge pulses occurring in alternating time frames. the cell in one slot charges while the other relaxe s and the effective fast-charg e current is 48.4% of the magnitude set by the charge-source current limit. the par allel configuration skips a charge pulse every 32 clock cycles to facilitate independent testing of the open- and closed-circuit cell voltages (v off and v on , respectively). since the charge regime of each cell is independent, one cell may complete a charge phase before the other. the more fully charged cell of a pair inserted at t he same time could terminate fast charge by - v, then charge in top-off while the less charged cell continues in fast charge. in t he case of an improper or faulty cell (e.g., alkaline) being inserted along with a proper cell (nimh or nicd), charging of the faulty cell would be st opped, while the proper cell is charged to full. series mode fast charge referring to figure 3. series configuration with external current regulation, cc1 controls the pnp switch that gates current to the cell(s). in series mode, 1 or 2 cells can be charged, depending on whether the 1-cell or 2-cell series mode has been selected. during fa st charge, current is gated to the cell(s) almost continuously, with the effective fast-charge current approx imately equal to current limit of the charge source. the series configuration deactivates cc 1 briefly every 32 clock cycles to facilitate independent testing of v off and v on of each cell. the one second deactivation makes the duty factor 0.969 and therefore the effective current equals approximately 97% of the charge-source cu rrent limit. in the 2-cell series mode, the characteristics of each cell are evaluated individually; however chargi ng stops if either cell is determined to be improper or faulty. in the 1-cell charge series mode, cc1 gates the charge cu rrent as in the 2-cell series mode. the cell voltage is monitored between vp1 and vn1, and temperature is moni tored with thm1. the vp2 and thm2 pins can be left floating in the 1-cell series mode. example capacities and charge rates parallel charging example: a 1700mah cell is charged using a 1a regulated charge so urce. during fast charge, the cell is charged at a duty factor of 0.484 and receives an effective charge current of 0.484a. in terms of c-rate, this is 484ma/1700mah = 0.285 c (or c/3.5). during precharge and top-off, the duty fa ctor is 0.125 (i.e., 1/8) , for an effective average current of 125ma, corresponding to a c -rate of 125/1700 = 0.073c (or c/13.6). similarly, in maintenance mode, the duty factor is 0.0156 (i.e., 1/64) and the c-rate is 15. 6/1700 = 0.0092 ( or c/109). the c-rates for charging 3 different cell capacities using a 500ma and a 1000ma current source are shown in table 4. www..net
DS2711/ds2712: loose cell nimh charger 14 of 15 table 4. parallel configuration, each cell mode current limit 500ma current limit 1000ma cell capacity 900mah 1700mah 2200mah 900mah 1700mah 2200mah fast c/3.72 c/7.02 c/9. 08 c/1.86 c/3.51 c/4.54 precharge/top-off c/14.4 c/27. 2 c/35.2 c/7.20 c/13.6 c/17.6 maintenance c/115 c/218 c/282 c/57.6 c/109 c/141 series and single cell charging example: in the series and single-cell modes, the effective fast ch arge current is equal to 0.969 times the regulated current limit and the top-off current is 0.25 times the regulated cu rrent. the maintenance mode is identical to the parallel charging rate, that is, 1/64 times the regulated current. t he c-rates for charging 3 different cell capacities using a 500ma and a 1000ma current source are shown in the following table. table 5. series configuration, each cell mode current limit 500ma current limit 1000ma cell capacity 900mah 1700mah 2200mah 900mah 1700mah 2200mah fast c/1.86 c/3.51 c/4. 54 c/0.93 c/1.75 c/2.27 precharge/top-off c/7.20 c/13. 6 c/17.6 c/3.60 c/6.80 c/8.80 maintenance c/115 c/218 c/282 c/57.6 c/109 c/141 led1 and led2 output s, mode-select input open-drain outputs led1 and led2 pull low to indica te charge status. when inactive, the outputs are high impedance. led1 displays the status for the cell moni tored by vp1 and led2 displays the status for the cell monitored by vp2. the led pins drive low in three ?blink? patterns to annunciate the charge status. table 6 summarizes the led operation in each display mode (dm0, dm1, dm2) for each charge condition. in parallel mode, led1 indicates the status of the cell whose positive terminal is connected to vp1 and led2 indicates the status of the cell whose positive terminal is connected to vp2. in series mode, le d1 indicates the charge status for both cells since they are charged in series. table 6. display patterns by di splay mode and charge activity display mode charge activity dmsel pin no battery pre/fast/top- off charging maintenance fault dm0 low high-z low 0.80s low 0.16s high-z 0.48s low 0.48s high-z dm1 float high-z low high-z 0.16s low 0.16s high-z dm2 high high-z 0.80s low 0.16s high-z low 0.16s low 0.16s high-z high-z = high impedance package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . www..net
DS2711/ds2712: loose cell nimh charger 15 of 15 revision history revision date description pages changed 120808 changed figure 2 to include ?t <0? as a condition to move from pre-charge to fault state. 6 www..net

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